Introduce callee-saved-regs clobber macro
Self-explanatory. The list of callee-saved regs on ARM comes from the ARMv8 Procedure Call Standard.
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@@ -3060,6 +3060,22 @@ struct DepthGuard { bool depthOne() const { return false; } };
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#endif
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/*
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* enterTCHelper does not save callee-saved registers except %rbp. This means
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* when we call it from C++, we have to tell gcc to clobber all the other
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* callee-saved registers.
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*/
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#if defined(__x86_64__)
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# define CALLEE_SAVED_BARRIER() \
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asm volatile("" : : : "rbx", "r12", "r13", "r14", "r15")
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#elif defined(__AARCH64EL__)
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# define CALLEE_SAVED_BARRIER() \
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asm volatile("" : : : "x19", "x20", "x21", "x22", "x23", "x24", "x25", \
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"x26", "x27", "x28", "x29")
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#else
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# error What are the callee-saved registers on your system?
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#endif
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/*
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* enterTCHelper
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*
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@@ -3071,10 +3087,6 @@ struct DepthGuard { bool depthOne() const { return false; } };
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* rcx: TReqInfo* infoPtr
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* r8: ActRec* firstAR
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* r9: uint8_t* targetCacheBase
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*
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* Note: enterTCHelper does not save callee-saved registers except
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* %rbp. This means when we call it from C++, we have to tell gcc to
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* clobber all the other callee-saved registers.
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*/
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static_assert(rVmSp == rbx &&
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rVmFp == rbp &&
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@@ -3232,13 +3244,12 @@ TranslatorX64::enterTC(SrcKey sk) {
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vmfp(), ((ActRec*)vmfp())->m_func->name()->data(), vmsp());
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tl_regState = REGSTATE_DIRTY;
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// The asm volatile here is to force C++ to spill anything that
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// might be in a callee-saved register (aside from rbp).
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// enterTCHelper does not preserve these registers.
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asm volatile("" : : : "rbx","r12","r13","r14","r15");
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// We have to force C++ to spill anything that might be in a callee-saved
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// register (aside from rbp). enterTCHelper does not save them.
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CALLEE_SAVED_BARRIER();
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enterTCHelper(vmsp(), vmfp(), start, &info, vmFirstAR(),
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tl_targetCaches);
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asm volatile("" : : : "rbx","r12","r13","r14","r15");
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CALLEE_SAVED_BARRIER();
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assert(g_vmContext->m_stack.isValidAddress((uintptr_t)vmsp()));
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tl_regState = REGSTATE_CLEAN; // Careful: pc isn't sync'ed yet.
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