All inc and dec, all the time.
On older processors, inc and dec have some specific hazards associated with their preservation of the CF flag. Sandy Bridge doesn't suffer from this, so let's take the code size wins here. Thanks to Guilherme for updating my dated priors on this. Also fix a pair of assembler bugs: no such thing as decl r32 on x64, and some decs were really incs.
Esse commit está contido em:
kma
@@ -912,13 +912,12 @@ void CodeGenerator::cgBinaryIntOp(IRInstruction* inst,
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if (src1Reg == InvalidReg && src2Reg == InvalidReg) {
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assert(src1->isConst() && src2->isConst());
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int64_t value = oper(src1->getValRawInt(),
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src2->getValRawInt());
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src2->getValRawInt());
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emitLoadImm(a, value, dstReg);
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return;
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}
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// One register, and one immediate.
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if (commutative) {
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int64_t immed = (src2Reg == InvalidReg
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? src2 : src1)->getValRawInt();
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@@ -933,7 +932,6 @@ void CodeGenerator::cgBinaryIntOp(IRInstruction* inst,
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}
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// NonCommutative:
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if (src1Reg == InvalidReg) {
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if (dstReg == src2Reg) {
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emitLoadImm(a, src1->getValRawInt(), rScratch);
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@@ -964,9 +962,9 @@ void CodeGenerator::cgBinaryOp(IRInstruction* inst,
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if (!(src1->isA(Type::Bool) || src1->isA(Type::Int) || src1->isA(Type::Dbl))
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||
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!(src2->isA(Type::Bool) || src2->isA(Type::Int) || src2->isA(Type::Dbl)) )
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{
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CG_PUNT(cgBinaryOp);
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}
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{
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CG_PUNT(cgBinaryOp);
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}
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if (src1->isA(Type::Dbl) || src2->isA(Type::Dbl)) {
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prepBinaryXmmOp(m_as, src1, src2);
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(m_as.*fpInstr)(xmm1, xmm0);
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@@ -2447,12 +2445,12 @@ void CodeGenerator::cgExitGuardFailure(IRInstruction* inst) {
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}
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static void emitAssertFlagsNonNegative(CodeGenerator::Asm& as) {
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ifThen(as, CC_NGE, [&] { as.int3(); });
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ifThen(as, CC_NGE, [&] { as.ud2(); });
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}
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static void emitAssertRefCount(CodeGenerator::Asm& as, PhysReg base) {
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as.cmpl(HPHP::RefCountStaticValue, base[FAST_REFCOUNT_OFFSET]);
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ifThen(as, CC_NBE, [&] { as.int3(); });
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ifThen(as, CC_NBE, [&] { as.ud2(); });
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}
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static void emitIncRef(CodeGenerator::Asm& as, PhysReg base) {
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@@ -2460,7 +2458,7 @@ static void emitIncRef(CodeGenerator::Asm& as, PhysReg base) {
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emitAssertRefCount(as, base);
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}
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// emit incref
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as.addl(1, base[FAST_REFCOUNT_OFFSET]);
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as.incl(base[FAST_REFCOUNT_OFFSET]);
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if (RuntimeOption::EvalHHIRGenerateAsserts) {
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// Assert that the ref count is greater than zero
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emitAssertFlagsNonNegative(as);
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@@ -2724,7 +2722,7 @@ Address CodeGenerator::cgCheckStaticBitAndDecRef(Type type,
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emitAssertRefCount(m_as, dataReg);
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}
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// Load _count in scratchReg
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m_as.load_reg64_disp_reg32(dataReg, FAST_REFCOUNT_OFFSET, scratchReg);
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m_as.loadl(dataReg[FAST_REFCOUNT_OFFSET], r32(scratchReg));
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// Check for RefCountStaticValue
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patchStaticCheck = cgCheckStaticBit(type, scratchReg,
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@@ -2732,7 +2730,7 @@ Address CodeGenerator::cgCheckStaticBitAndDecRef(Type type,
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// Decrement count and store it back in memory.
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// If there's an exit, emit jump to it when _count would get down to 0
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m_as.sub_imm32_reg32(1, scratchReg);
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m_as.decq(scratchReg);
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if (exit) {
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emitFwdJcc(CC_E, exit);
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}
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@@ -2772,7 +2770,7 @@ Address CodeGenerator::cgCheckStaticBitAndDecRef(Type type,
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}
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// Decrement _count
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m_as.sub_imm32_disp_reg32(1, FAST_REFCOUNT_OFFSET, dataReg);
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m_as.decl(dataReg[FAST_REFCOUNT_OFFSET]);
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if (RuntimeOption::EvalHHIRGenerateAsserts) {
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// Assert that the ref count is not less than zero
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@@ -3426,7 +3424,7 @@ static void emitLdClsCctx(CodeGenerator::Asm& a,
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PhysReg srcReg,
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PhysReg dstReg) {
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emitMovRegReg(a, srcReg, dstReg);
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a. subq(1, dstReg);
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a. decq(dstReg);
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}
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void CodeGenerator::cgLdClsCtx(IRInstruction* inst) {
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@@ -873,7 +873,7 @@ TranslatorX64::emitIncRef(X64Assembler &a, PhysReg base, DataType dtype) {
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* compact, it only writes the low-order 8 bits of eflags, causing a
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* partial dependency for any downstream flags-dependent code.
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*/
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a. add_imm32_disp_reg32(1, FAST_REFCOUNT_OFFSET, base);
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a. incl(base[FAST_REFCOUNT_OFFSET]);
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} // endif
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}
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@@ -888,7 +888,7 @@ TranslatorX64::emitIncRefGenericRegSafe(PhysReg base,
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tmpReg);
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{ // if !static
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IfCountNotStatic ins(a, tmpReg);
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a. add_imm32_disp_reg32(1, FAST_REFCOUNT_OFFSET, tmpReg);
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a. incl(tmpReg[FAST_REFCOUNT_OFFSET]);
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} // endif
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} // endif
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}
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@@ -992,7 +992,7 @@ void TranslatorX64::emitDecRef(Asm& a,
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SpaceRecorder sr("_DecRef", a);
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{ // if !static
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IfCountNotStatic ins(a, rDatum, type);
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a. sub_imm32_disp_reg32(1, FAST_REFCOUNT_OFFSET, rDatum);
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a. decl(rDatum[FAST_REFCOUNT_OFFSET]);
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assert(type >= 0 && type < MaxNumDataTypes);
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if (&a == &this->astubs) {
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@@ -1201,7 +1201,7 @@ void TranslatorX64::emitGenericDecRefHelpers() {
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m_dtorGenericStubRegs = a.code.frontier;
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a. cmpl (RefCountStaticValue, rdi[FAST_REFCOUNT_OFFSET]);
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jccBlock<CC_Z>(a, [&] {
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a. subl (1, rdi[FAST_REFCOUNT_OFFSET]);
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a. decl (rdi[FAST_REFCOUNT_OFFSET]);
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release.jcc8(a, CC_Z);
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});
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a. ret ();
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@@ -2288,7 +2288,7 @@ TranslatorX64::emitPrologue(Func* func, int nPassed) {
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// rather than execution speed; i.e., don't unroll the loop.
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TCA loopTop = a.code.frontier;
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a. sub_imm32_reg64(sizeof(Cell), rVmSp);
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a. add_imm32_reg32(1, rax);
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a. incl(eax);
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emitStoreUninitNull(a, 0, rVmSp);
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a. cmp_imm32_reg32(numParams, rax);
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a. jcc8(CC_L, loopTop);
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@@ -7429,7 +7429,7 @@ void TranslatorX64::translateCreateCont(const Tracelet& t,
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const int thisOff = cellsToBytes(genLocals - thisId - 1);
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// We don't have to check for a static refcount since we
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// know it's an Object
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a. addl(1, r(rScratch)[FAST_REFCOUNT_OFFSET]);
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a. incl(r(rScratch)[FAST_REFCOUNT_OFFSET]);
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a. storeq(r(rScratch), r(rDest)[thisOff + TVOFF(m_data)]);
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emitStoreTVType(a, KindOfObject, r(rDest)[thisOff + TVOFF(m_type)]);
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}
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@@ -7624,7 +7624,7 @@ void TranslatorX64::emitContPreNext(const NormalizedInstruction& i,
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}
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// ++m_index
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a. add_imm64_disp_reg64(0x1, CONTOFF(m_index), r(rCont));
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a. incq(r(rCont)[CONTOFF(m_index)]);
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// m_running = true
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a. store_imm8_disp_reg(0x1, CONTOFF(m_running), r(rCont));
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}
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@@ -8561,9 +8561,9 @@ TranslatorX64::translateIncDecL(const Tracelet& t,
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emitMovRegReg(a, localVal, output);
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}
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if (inc) {
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a. add_imm32_reg64(1, localVal);
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a. incq(localVal);
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} else {
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a. sub_imm32_reg64(1, localVal);
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a. decq(localVal);
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}
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if (i.outStack && pre) { // --$a, ++$a
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PhysReg output = getReg(i.outStack->location);
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@@ -9396,7 +9396,7 @@ TranslatorX64::emitFPushCtorDFast(const NormalizedInstruction& i,
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if (i.noCtor) {
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// If we're not running the constructor, just incref the object once and
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// don't set up the ActRec.
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a.add_imm32_disp_reg32(1, FAST_REFCOUNT_OFFSET, rax);
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a.incl(rax[FAST_REFCOUNT_OFFSET]);
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return;
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} else {
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// Incref the object twice: once for the stack and once for $this in the
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@@ -11627,7 +11627,7 @@ asm_label(a, release);
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a. loadq (rIter[TVOFF(m_data)], rData);
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a. cmpl (RefCountStaticValue, rData[FAST_REFCOUNT_OFFSET]);
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jccBlock<CC_Z>(a, [&] {
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a. subl (1, rData[FAST_REFCOUNT_OFFSET]);
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a. decl (rData[FAST_REFCOUNT_OFFSET]);
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a. jz8 (doRelease);
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});
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a. ret ();
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@@ -1053,7 +1053,7 @@ struct X64Assembler {
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void incq(Reg64 r) { instrR(instr_inc, r); }
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void incl(Reg32 r) { instrR(instr_inc, r); }
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void decq(Reg64 r) { instrR(instr_dec, r); }
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void decl(Reg32 r) { instrR(instr_dec, r); }
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// decl(Reg32) cannot be encoded; it's REX.
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void notb(Reg8 r) { instrR(instr_notb, r); }
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void not(Reg64 r) { instrR(instr_not, r); }
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void neg(Reg64 r) { instrR(instr_neg, r); }
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@@ -1072,7 +1072,7 @@ struct X64Assembler {
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void incq(MemoryRef m) { instrM(instr_inc, m); }
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void incl(MemoryRef m) { instrM32(instr_inc, m); }
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void decq(MemoryRef m) { instrM(instr_dec, m); }
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void decl(MemoryRef m) { instrM32(instr_inc, m); }
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void decl(MemoryRef m) { instrM32(instr_dec, m); }
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void movdqu(RegXMM x, MemoryRef m) { instrRM(instr_movdqu, x, m); }
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void movdqu(RegXMM x, IndexedMemoryRef m) { instrRM(instr_movdqu, x, m); }
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