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Change-Id: I9be5462819ffdaa23af0b874a15d0959d640a4e3
Esse commit está contido em:
Mike Voydanoff
2017-07-25 07:00:31 -07:00
pai cd8fd74356
commit f48cef3768
5 arquivos alterados com 68 adições e 9 exclusões
Baixar Arquivo de Patch Baixar Arquivo de Diff Expandir todos os arquivos Colapsar todos os arquivos
system/dev/usb/hi3660-dwc3/dwc3-regs.h
+24
Ver Arquivo
@@ -88,7 +88,31 @@
#define GSBUSCFG1 0xc104 // Global SoC Bus Configuration Register 1
#define GTXTHRCFG 0xc108 // Global Tx Threshold Control Register
#define GRXTHRCFG 0xc10c // Global Rx Threshold Control Register
#define GCTL 0xc110 // Global Core Control Register
#define GCTL_PWRDNSCALE_START 19
#define GCTL_PWRDNSCALE_BITS 13
#define GCTL_MASTERFILTBYPASS (1 << 18)
#define GCTL_BYPSSETADDR (1 << 17)
#define GCTL_U2RSTECN (1 << 16)
#define GCTL_FRMSCLDWN_START 14
#define GCTL_FRMSCLDWN_BITS 2
#define GCTL_PRTCAPDIR_START 12
#define GCTL_PRTCAPDIR_BITS 2
#define GCTL_PRTCAPDIR_HOST (1 << GCTL_PRTCAPDIR_START)
#define GCTL_PRTCAPDIR_DEVICE (2 << GCTL_PRTCAPDIR_START)
#define GCTL_PRTCAPDIR_OTG (3 << GCTL_PRTCAPDIR_START)
#define GCTL_PRTCAPDIR_MASK (3 << GCTL_PRTCAPDIR_START)
#define GCTL_CORESOFTRESET (1 << 11)
#define GCTL_U1_U2_TIMER_SCALE (1 << 9)
#define GCTL_DEBUGATTACH (1 << 8)
#define GCTL_SCALEDOWN_START 4
#define GCTL_SCALEDOWN_BITS 2
#define GCTL_DISSCRAMBLE (1 << 3)
#define GCTL_U2EXIT_LFPS (1 << 2)
#define GCTL_GBL_HIBERNATION_EN (1 << 1)
#define GCTL_DSBLCLKGTNG (1 << 0)
#define GPMSTS 0xc114 // Global Power Management Status Register
#define GSTS 0xc118 // Global Status Register
#define GUCTL1 0xc11c // Global User Control Register 1
system/dev/usb/hi3660-dwc3/hi3660-dwc3.c
+12 -5
Ver Arquivo
@@ -29,7 +29,6 @@ enum {
enum {
IRQ_USB3,
IRQ_USB3_OTG,
IRQ_USB3_BC,
};
typedef struct {
@@ -197,7 +196,6 @@ static mx_status_t hi3360_dwc3_bind(void* ctx, mx_device_t* dev, void** cookie)
goto fail;
}
printf("call hi3360_dwc3_init\n");
if ((status = hi3360_dwc3_init(dwc)) != MX_OK) {
goto fail;
@@ -212,18 +210,27 @@ printf("did hi3360_dwc3_init\n");
hexdump8(dwc->peri_crg.vaddr, 256);
*/
// set host mode
printf("set host mode\n");
volatile void* usb3otg = dwc->usb3otg.vaddr;
uint32_t temp = readl(usb3otg + GCTL);
temp &= ~GCTL_PRTCAPDIR_MASK;
temp |= GCTL_PRTCAPDIR_HOST;
writel(temp, usb3otg + GCTL);
printf("GCTL: %08X\n", temp);
printf("usbotg:\n");
hexdump8(dwc->usb3otg.vaddr, 256);
hexdump(dwc->usb3otg.vaddr, 256);
printf("global registers:\n");
hexdump(dwc->usb3otg.vaddr + GSBUSCFG0, 256);
printf("device registers:\n");
hexdump(dwc->usb3otg.vaddr + DCFG, 256);
// writel(0x1c466e3, dwc->usb3otg_bc.vaddr + USBOTG3_CTRL4);
device_add_args_t args = {
.version = DEVICE_ADD_ARGS_VERSION,
.name = "hi3600-dwc3",
.name = "dwc3-xhci",
.ctx = dwc,
.ops = &hi3360_dwc3_device_proto,
.proto_id = MX_PROTOCOL_USB_XHCI,
system/dev/usb/hi3660-dwc3/hi3660-regs.h
-1
Ver Arquivo
@@ -92,4 +92,3 @@
#define USB3OTG_PHY_CR_READ (1 << 2)
#define USB3OTG_PHY_CR_CAP_DATA (1 << 1)
#define USB3OTG_PHY_CR_CAP_ADDR (1 << 0)
system/dev/usb/xhci/usb-xhci.c
+16 -2
Ver Arquivo
@@ -15,13 +15,14 @@
#include <stdlib.h>
#include <string.h>
#include <threads.h>
#include <unistd.h>
#include "xhci-device-manager.h"
#include "xhci-root-hub.h"
#include "xhci-util.h"
#include "xhci.h"
//#define TRACE 1
#define TRACE 1
#include "xhci-debug.h"
#define MAX_SLOTS 255
@@ -194,6 +195,7 @@ static int xhci_irq_thread(void* arg) {
mx_thread_set_priority(24 /* HIGH_PRIORITY in LK */);
while (1) {
/*
mx_status_t wait_res;
wait_res = mx_interrupt_wait(xhci->irq_handle);
@@ -203,30 +205,36 @@ static int xhci_irq_thread(void* arg) {
break;
}
mx_interrupt_complete(xhci->irq_handle);
mx_interrupt_complete(xhci->irq_handle)
*/
xhci_handle_interrupt(xhci);
sleep(1);
}
xprintf("xhci_irq_thread done\n");
return 0;
}
static mx_status_t usb_xhci_bind(void* ctx, mx_device_t* dev, void** cookie) {
printf("usb_xhci_bind\n");
mx_handle_t irq_handle = MX_HANDLE_INVALID;
xhci_t* xhci = NULL;
mx_status_t status;
usb_xhci_protocol_t xhci_proto;
if (device_get_protocol(dev, MX_PROTOCOL_USB_XHCI, &xhci_proto)) {
printf("usb_xhci_bind MX_ERR_NOT_SUPPORTED\n");
status = MX_ERR_NOT_SUPPORTED;
goto error_return;
}
xhci = calloc(1, sizeof(xhci_t));
if (!xhci) {
printf("usb_xhci_bind MX_ERR_NO_MEMORY\n");
status = MX_ERR_NO_MEMORY;
goto error_return;
}
printf("usb_xhci_bind aa\n");
void* mmio;
uint64_t mmio_len;
/*
@@ -238,6 +246,7 @@ static mx_status_t usb_xhci_bind(void* ctx, mx_device_t* dev, void** cookie) {
printf("usb_xhci_bind: usb_xhci_get_mmio failed\n");
goto error_return;
}
printf("usb_xhci_bind 2\n");
// register for interrupts
status = usb_xhci_get_interrupt(&xhci_proto, 0, &irq_handle);
@@ -246,16 +255,20 @@ static mx_status_t usb_xhci_bind(void* ctx, mx_device_t* dev, void** cookie) {
goto error_return;
}
printf("usb_xhci_bind 3\n");
xhci->irq_handle = irq_handle;
xhci->legacy_irq_mode = usb_xhci_legacy_irq_mode(&xhci_proto);
// stash this here for the startup thread to call device_add() with
xhci->parent = dev;
printf("call xhci_init\n");
status = xhci_init(xhci, mmio);
if (status != MX_OK) {
goto error_return;
}
printf("usb_xhci_bind 4\n");
thrd_t thread;
thrd_create_with_name(&thread, xhci_irq_thread, xhci, "xhci_irq_thread");
@@ -264,6 +277,7 @@ static mx_status_t usb_xhci_bind(void* ctx, mx_device_t* dev, void** cookie) {
return MX_OK;
error_return:
printf("bind failed\n");
if (xhci) {
free(xhci);
}
system/dev/usb/xhci/xhci.c
+16 -1
Ver Arquivo
@@ -18,7 +18,7 @@
#include "xhci-root-hub.h"
#include "xhci-transfer.h"
//#define TRACE 1
#define TRACE 1
#include "xhci-debug.h"
#define PAGE_ROUNDUP(x) ((x + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1))
@@ -193,6 +193,7 @@ mx_status_t xhci_init(xhci_t* xhci, void* mmio) {
mx_status_t result = MX_OK;
mx_paddr_t* phys_addrs = NULL;
printf("xhci_init 1\n");
list_initialize(&xhci->command_queue);
mtx_init(&xhci->command_ring_lock, mtx_plain);
mtx_init(&xhci->command_queue_mutex, mtx_plain);
@@ -200,10 +201,16 @@ mx_status_t xhci_init(xhci_t* xhci, void* mmio) {
mtx_init(&xhci->input_context_lock, mtx_plain);
completion_reset(&xhci->command_queue_completion);
printf("xhci_init 2\n");
xhci->cap_regs = (xhci_cap_regs_t*)mmio;
printf("xhci->cap_regs %p\n", xhci->cap_regs);
printf("xhci->cap_regs->length %u\n", xhci->cap_regs->length);
xhci->op_regs = (xhci_op_regs_t*)((uint8_t*)xhci->cap_regs + xhci->cap_regs->length);
printf("xhci->op_regs %p\n", xhci->op_regs);
xhci->doorbells = (uint32_t*)((uint8_t*)xhci->cap_regs + xhci->cap_regs->dboff);
printf("xhci->doorbells %p\n", xhci->doorbells);
xhci->runtime_regs = (xhci_runtime_regs_t*)((uint8_t*)xhci->cap_regs + xhci->cap_regs->rtsoff);
printf("xhci->runtime_regs %p\n", xhci->runtime_regs);
volatile uint32_t* hcsparams1 = &xhci->cap_regs->hcsparams1;
volatile uint32_t* hcsparams2 = &xhci->cap_regs->hcsparams2;
volatile uint32_t* hccparams1 = &xhci->cap_regs->hccparams1;
@@ -211,12 +218,17 @@ mx_status_t xhci_init(xhci_t* xhci, void* mmio) {
xhci->max_slots = XHCI_GET_BITS32(hcsparams1, HCSPARAMS1_MAX_SLOTS_START,
HCSPARAMS1_MAX_SLOTS_BITS);
printf("xhci->max_slots %zu\n", xhci->max_slots);
xhci->max_interruptors = XHCI_GET_BITS32(hcsparams1, HCSPARAMS1_MAX_INTRS_START,
HCSPARAMS1_MAX_INTRS_BITS);
printf("xhci->max_interruptors %zu\n", xhci->max_interruptors);
xhci->rh_num_ports = XHCI_GET_BITS32(hcsparams1, HCSPARAMS1_MAX_PORTS_START,
HCSPARAMS1_MAX_PORTS_BITS);
printf("xhci->rh_num_ports %u\n", xhci->rh_num_ports);
xhci->context_size = (XHCI_READ32(hccparams1) & HCCPARAMS1_CSZ ? 64 : 32);
printf("xhci->context_size %zu\n", xhci->context_size);
xhci->large_esit = !!(XHCI_READ32(hccparams2) & HCCPARAMS2_LEC);
printf("xhci->large_esit %u\n", xhci->large_esit);
uint32_t scratch_pad_bufs = XHCI_GET_BITS32(hcsparams2, HCSPARAMS2_MAX_SBBUF_HI_START,
HCSPARAMS2_MAX_SBBUF_HI_BITS);
@@ -224,6 +236,7 @@ mx_status_t xhci_init(xhci_t* xhci, void* mmio) {
scratch_pad_bufs |= XHCI_GET_BITS32(hcsparams2, HCSPARAMS2_MAX_SBBUF_LO_START,
HCSPARAMS2_MAX_SBBUF_LO_BITS);
xhci->page_size = XHCI_READ32(&xhci->op_regs->pagesize) << 12;
printf("xhci->page_size %zu\n", xhci->page_size);
// allocate array to hold our slots
// add 1 to allow 1-based indexing of slots
@@ -571,10 +584,12 @@ static void xhci_handle_events(xhci_t* xhci, int interruptor) {
}
void xhci_handle_interrupt(xhci_t* xhci) {
volatile uint32_t* usbsts = &xhci->op_regs->usbsts;
const int interruptor = 0;
uint32_t status = XHCI_READ32(usbsts);
printf("xhci_handle_interrupt status %p: %08X\n", usbsts, status);
uint32_t clear = status & USBSTS_CLEAR_BITS;
XHCI_WRITE32(usbsts, clear);